Fast delayed signal cancellation based PLL for unbalanced grid conditions
dc.creator | Contreras, Camilo | |
dc.creator | Guajardo Alegría, David | |
dc.creator | Díaz Díaz, Matías | |
dc.creator | Rojas Lobos, Felix Eduardo | |
dc.creator | Espinoza Bolaños, Mauricio | |
dc.creator | Cárdenas Dobson, Jesús Roberto Pedro Alejandro | |
dc.date.accessioned | 2024-11-19T17:23:34Z | |
dc.date.available | 2024-11-19T17:23:34Z | |
dc.date.issued | 2019-01-13 | |
dc.description.abstract | Frequency identification is one of the most critical issues for grid-connected power converters, especially when the grid is unbalanced or distorted. Therefore, this paper proposes a novel frequency estimator with fast convergence for balance and unbalanced grid-voltage faults. The proposed algorithm is based on a Phase Locked Loop (PLL), enhanced with a fast positive and negative sequence detector. Delayed Signal Cancellation methodology with fast convergence is investigated under single-phase and two-phase voltage dip. The effectiveness of the proposed PLL is validated using simulations and experimental results. | |
dc.description.procedence | UCR::Vicerrectoría de Docencia::Ingeniería::Facultad de Ingeniería::Escuela de Ingeniería Eléctrica | |
dc.description.sponsorship | Universidad de Santiago de Chile/[091813DD]/USACH/Chile | |
dc.description.sponsorship | Universidad de Santiago de Chile/[091813DD-RED]/USACH/Chile | |
dc.description.sponsorship | Fondo de Fomento al Desarrollo Científico y Tecnológico/[1180879]/FONDECYT/Chile | |
dc.description.sponsorship | Centro Avanzado de Ingeniería Eléctrica y Electrónica/[FB0008]/AC3E/Chile | |
dc.identifier.doi | https://doi.org/10.1109/ICA-ACCA.2018.8609741 | |
dc.identifier.isbn | 978-1-5386-5586-3 | |
dc.identifier.isbn | 978-1-5386-5585-6 | |
dc.identifier.isbn | 978-1-5386-5587-0 | |
dc.identifier.uri | https://hdl.handle.net/10669/100086 | |
dc.language.iso | eng | |
dc.source | 2018 IEEE International Conference on Automation/XXIII Congress of the Chilean Association of Automatic Control (ICA-ACCA). Institute of Electrical and Electronics Engineers. Estados Unidos | |
dc.subject | Phase Locked Loop | |
dc.subject | Double Synchronous Reference Frame | |
dc.subject | Double Second Order Generalized Integrator | |
dc.subject | Delayed Signal Cancellation | |
dc.subject | Delays | |
dc.subject | Voltage fluctuations | |
dc.subject | Frequency estimation | |
dc.subject | Voltage control | |
dc.subject | Time-frequency analysis | |
dc.subject | Frequency control | |
dc.title | Fast delayed signal cancellation based PLL for unbalanced grid conditions | |
dc.type | comunicación de congreso |
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