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Fast delayed signal cancellation based PLL for unbalanced grid conditions

dc.creatorContreras, Camilo
dc.creatorGuajardo Alegría, David
dc.creatorDíaz Díaz, Matías
dc.creatorRojas Lobos, Felix Eduardo
dc.creatorEspinoza Bolaños, Mauricio
dc.creatorCárdenas Dobson, Jesús Roberto Pedro Alejandro
dc.date.accessioned2024-11-19T17:23:34Z
dc.date.available2024-11-19T17:23:34Z
dc.date.issued2019-01-13
dc.description.abstractFrequency identification is one of the most critical issues for grid-connected power converters, especially when the grid is unbalanced or distorted. Therefore, this paper proposes a novel frequency estimator with fast convergence for balance and unbalanced grid-voltage faults. The proposed algorithm is based on a Phase Locked Loop (PLL), enhanced with a fast positive and negative sequence detector. Delayed Signal Cancellation methodology with fast convergence is investigated under single-phase and two-phase voltage dip. The effectiveness of the proposed PLL is validated using simulations and experimental results.
dc.description.procedenceUCR::Vicerrectoría de Docencia::Ingeniería::Facultad de Ingeniería::Escuela de Ingeniería Eléctrica
dc.description.sponsorshipUniversidad de Santiago de Chile/[091813DD]/USACH/Chile
dc.description.sponsorshipUniversidad de Santiago de Chile/[091813DD-RED]/USACH/Chile
dc.description.sponsorshipFondo de Fomento al Desarrollo Científico y Tecnológico/[1180879]/FONDECYT/Chile
dc.description.sponsorshipCentro Avanzado de Ingeniería Eléctrica y Electrónica/[FB0008]/AC3E/Chile
dc.identifier.doihttps://doi.org/10.1109/ICA-ACCA.2018.8609741
dc.identifier.isbn978-1-5386-5586-3
dc.identifier.isbn978-1-5386-5585-6
dc.identifier.isbn978-1-5386-5587-0
dc.identifier.urihttps://hdl.handle.net/10669/100086
dc.language.isoeng
dc.source2018 IEEE International Conference on Automation/XXIII Congress of the Chilean Association of Automatic Control (ICA-ACCA). Institute of Electrical and Electronics Engineers. Estados Unidos
dc.subjectPhase Locked Loop
dc.subjectDouble Synchronous Reference Frame
dc.subjectDouble Second Order Generalized Integrator
dc.subjectDelayed Signal Cancellation
dc.subjectDelays
dc.subjectVoltage fluctuations
dc.subjectFrequency estimation
dc.subjectVoltage control
dc.subjectTime-frequency analysis
dc.subjectFrequency control
dc.titleFast delayed signal cancellation based PLL for unbalanced grid conditions
dc.typecomunicación de congreso

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